Master Course Description

No: EE 473

Title: Linear Integrated Circuits

Credits: 5

UW Course Catalog Description

Coordinator: Brian Otis, Assistant Professor of Electrical Engineering

Goals: To learn the analysis, simulation and synthesis techniques and vocabulary of linear integrated circuits implemented in the two major integrated circuit technologies: BJT and MOS. To achieve expertise and experience in SPICE circuit simulation tools.

Learning Objectives: At the end of this course, students will be able to:

  1. Calculate large-signal and small-signal parameters for BJT or MOS active devices.
  2. Analyze, simulate and synthesize single-stage BJT or MOS amplifiers.
  3. Analyze, simulate and synthesize BJT and MOS current mirror circuits for DC bias and active-load applications.
  4. Analyze, simulate and synthesize BJT and MOS amplifier frequency responses.
  5. Analyze, simulate and synthesize BJT and MOS operational amplifiers.
  6. Analyze, simulate and synthesize BJT and MOS amplifier output stages.

Textbook: B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw Hill, 2001

Reference Texts: P.R. Gray, P.J. Hurst, S.H. Lewis and R.G. Meyer, Analysis and Design of Analog Integrated Circuits, 4th ed., John Wiley and Sons, Inc., 2001

Prerequisites by Topic:

  1. Continuous-time signal analysis
  2. Fourier series and transforms in continuous time
  3. Physics, characteristics, applications and analysis of circuits using semiconductor diodes, BJT, and MOS devices
  4. Background on small-signal modeling and circuit analysis using BJT and MOS devices
  5. Background on low and high frequency analysis of basic linear DC bias and simple gain stages
  6. Familiarity with stability considerations and frequency compensation in operational amplifiers


  1. Large- and small-signal integrated circuit active device models (3 lectures)
  2. Single-stage amplifiers (3 lectures)
  3. Current Mirrors (2 lectures)
  4. Frequency response (4 lectures)
  5. Operational amplifiers (4 lectures)
  6. Output stages (2 lectures)
  7. I.C. Fabrication, Process Variations, and Yield (1 lecture)

Course Structure: The class meets for two lectures a week, each consisting of a 110-minute session. Additionally, the class offers a 50-minute TA- or professor-led discussion session to emphasize course fundamentals and present examples. There are approximately six homework assignments that include small SPICE simulation projects. There are multiple design projects that require SPICE simulation for verification of specifications; the projects include written presentations. There is a written midterm examination and a written final examination.

Computer Resources: The computer simulations (HSPICE, PSPICE, or SPECTRE) can be done on any PC or on the SUN workstations available in the EE Dept.

Laboratory Resources: None.

Grading: 40% Homework, 20% projects, 15% midterm examination and 25% final examination.

Outcome Coverage:

(a) an ability to apply knowledge of mathematics, science and engineering. The vast majority of the lectures, homework and projects deal with the application of circuit theory and control theory to specific linear integrated circuit operation. Large- and small-signal semiconductor device characteristics are included in the formulations. Linear circuit analysis formulations are commonplace throughout the course. (H)

(c) an ability to design a system, component or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability, and sustainability. The course covers analysis and with emphasis on synthesis of linear integrated circuits, with associated homework and examination problems; the homework assignments and design projects are worth about 40% and 20%, respectively, of the course grade. There are two weeks of lecture on the frequency response and design for stability of operational amplifiers, with associated homework, design, and examination problems, worth approximately 30% of the course grade. The first two design projects involve the analysis, simulation and synthesis of one- and two-stage operational amplifiers in MOS technology; the third project involves the design of an operational amplifier in bipolar technology. Collectively, these projects account for 20% of the course grade. To incorporate realistic constraints, a module on Integrated Circuit process variations and yield will be taught. (M)

(e) an ability to identify, formulate and solve engineering problems. The homework and examinations involve solving engineering problems identified by the assignments and exemplified by class discussion. The design projects challenge the students to identify the issues and formulate their individual solutions. The projects are conducted in teams of two. Since both MOS and BJT technologies offer two major device options PMOS/NMOS and NPN/PNP, respectively, each team member chooses one of the two options. The team submits a written report describing the individual designs and comparing the two alternative implementations. (H)

(k) an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice. Students use SPICE to simulate homework problems and to support the design projects. (M)

Prepared By: Brian Otis and David J. Allstot

Last Revised: 05/10/2007