Master Course Description for EE-331 (ABET sheet)

Title:  Devices and Circuits 1

Credits:  5 (4 lecture; 1 lab)

UW Course Catalog Description

Coordinator:  Robert Bruce Darling, Professor, Electrical Engineering

Goals:  To learn the physics, characteristics, applications, analysis, and design of circuits using semiconductor diodes and field-effect transistors with an emphasis on large-signal behavior and digital logic circuits.  To understand and apply the principles of device modeling to circuit analysis and design.  To gain hands-on experience with laboratory instrumentation and circuit troubleshooting.

Learning Objectives: 

At the end of this course, students will be able to:

  1. Calculate conduction properties of materials and simple device structures.
  2. Explain the operating principles of semiconductor diodes and field-effect transistors.
  3. Determine the in-circuit operating state of the most common semiconductor devices.
  4. Perform large signal analysis of circuits containing semiconductor diodes and field-effect transistors.
  5. Use a modern schematic capture and computer-aided circuit analysis program, such as SPICE.
  6. Use modern computer-based data acquisition and instrument control software and systems, such as LabVIEW
  7. Calculate the performance parameters for different MOS logic families.
  8. Design power supply rectifiers, filters, and regulators.
  9. Design circuits for switching load devices.

Textbook:  R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design, 4th Ed., McGraw-Hill, 2011.  ISBN # 978-0-07-338045-8.  

Laboratory Handbook:  R. B. Darling, EE-331 Laboratory Handbook, Revision 6, September 2005.  Available from the class website.  

Reference Texts

  1. P. W. Tuinenga, SPICE:  A Guide to Circuit Simulation & Analysis Using PSPICE, 2nd ed.  Prentice-Hall, 1992.  ISBN # 0-13-747270-6 
  2. J. O. Attia, PSPICE and MATLAB for Electronics:  An Integrated Approach, CRC Press, 2002.  ISBN # 0-8493-1263-9
  3. R. H. Bishop, Learning with LabVIEW 2009, Pearson/Prentice-Hall/National Instruments, 2010.  ISBN # 978-0-13-214131-4. 

Prerequisites by Topic: 

  1. DC and AC circuit theory
  2. Calculus and differential equations
  3. Hands-on experience with laboratory instruments


I.    The Physics of Electrical Conduction (Jaeger and Blalock Chapters 1 and 2) [2 weeks]
        Single Carrier Conduction; Semiconductors and Energy Bands; Conduction Processes in Semiconductors; Effects at Junctions

II.    Semiconductor Diodes (Jaeger and Blalock Chapter 3) [3 weeks]
        Construction and Characteristics; Circuit Models; Circuit Analysis; Applications and Design

III.    Field-Effect Transistors (Jaeger and Blalock Chapter 4) [3 weeks]
        Construction and Characteristics; Circuit Models; Circuit Analysis; Applications and Design

IV.    Digital Logic Families (Jaeger and Blalock Chapters 6,7, and 8) [2 weeks]
        Characteristics and Parameters; nMOS and pMOS Logic; CMOS Logic; MOS Memory

Course Structure:  The class meets for four lectures a week, each consisting of 50-minutes.  Homework is assigned weekly for a total of 9 assignments over the quarter.  Two exams are given at the ends of the 4th and 8th weeks, and a comprehensive final exam is given at the end of the quarter.  Laboratory work constitutes a significant focus of the class and is organized into smaller laboratory sections, typically 24 students divided into 8 groups of 3 each, which meet weekly.  The laboratory consists of an introductory meeting the first week, six planned experiments over the next six weeks of the quarter, and a comprehensive design project that occupies the last three weeks of the quarter.  The experiments consist of between 6 to 10 procedures that are chosen from the laboratory handbook and which vary from quarter to quarter.  A new design project is given each quarter which reinforces the concepts, theory, and practice presented in the lectures and laboratory experiments. 

Computer Resources:  SPICE is used for circuit simulation along with schematic capture for circuit entry and component parameterization.  Two options are available, depending upon the instructor’s preference.  The older (free, but unsupported) legacy student evaluation version of OrCAD (Cadence) Capture and PSPICE is still made available; however, the more up-to-date National Instruments (Electronic Workbench) Multisim and Ultiboard are fully supported with a Departmental site license.  National Instruments LabVIEW is used for computer controlled data acquisition and instrument control, and it is also supported by a College-wide educational site license.   Capture, PSPICE, Multisim, Ultiboard and LabVIEW are available in all of the general purpose computing laboratories in the EE Department. 

Laboratory Resources:  The main electronics laboratory in room EEB 137 supports this class with benches equipped with oscilloscopes, power supplies, function generators, digital multimeters, test leads, and computers equipped with GPIB controller and data acquisition (DAQ) PCI cards.  Laboratory parts kits are available from the EE Stores, with sales of individual components as needed for the design projects.  

Grading:  Laboratory (30%), Homework (20%), Exam-1 (15%), Exam-2 (15%), Final Exam (20%)

Outcome Coverage:

(a) An ability to apply knowledge of math, science and engineering. The homework, exams, and laboratory experiments require direct application of mathematics, scientific, and engineering knowledge to successfully complete the course.  This includes component calculations, circuit analysis, device modeling, computer modeling, and an in-depth knowledge of modern semiconductor device operating characteristics.  (High relevance to course) 

(b) An ability to design and conduct experiments, as well as to analyze and interpret data..  Students conduct pre-designed experiments in the first part of the laboratory work.  In the second part, the students must develop bench-top troubleshooting skills to successfully complete and test their design project solutions, and hence design their own experiments as part of this.  (High relevance to course) 

(c) An ability to design a system, component, or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability and sustainability. Approximately one half of the homework problems are design oriented, requiring the students to specify components or a circuit topology to accomplish a given specification.  The laboratory concludes with a comprehensive, open-ended design project in which the students apply the material that they have been exposed to during the quarter to design, prototype, and test a small electronic subsystem.  (High relevance to course) 

(e) An ability to identify, formulate and solve engineering problems. The final design project is given as a set of specifications that the students' design must meet.  Therefore, they must identify the key limiting issues, formulate a solution strategy, research and test their approach, and finally prototype and test the design to prove that it works.   This represents the complete electronic engineering design cycle, albeit on a reduced scale that is suitable for ten weeks.  (High relevance to course) 

(h) The broad education necessary to understand the impact of engineering solutions in a global, economic, environmental and societal context.  Case studies of different engineering solutions are presented in class, comparing the alternatives and methods that are enabled by different technologies.  This is specifically shown through examples of power supply design tradeoffs and the evolution of digital logic families.  (Medium relevance to course) 

(k) An ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.  Industry standard schematic capture and analog circuit simulation is introduced and used in the class.  State of the art electronic instrumentation is used in the laboratory to give students hands-on experience with this equipment.  (Medium relevance to course) 

Prepared By:  R. Bruce Darling

Last revised:  12/15/2012